AiP74AHCT2G32

AiP74AHC1G00  are high-speed Si-gate CMOS devices. They provide a 2-input NAND function.The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V.

AiP74AHCT1G00 are high-speed Si-gate CMOS devices. They provide a 2-input NAND function.The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

AiP74AHC1G02 and AiP74AHCT1G02 are single 2-input nor gates.

AiP74AHC1G02 and AiP74AHCT1G02 are single 2-input nor gates.

AiP74AHC1G04 and AiP74AHCT1G04 are high-speed Si-gate CMOS devices. They provide an inverting buffer. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

The AiP74AHC1GU04 is a high-speed Si-gate CMOS device. It provides an inverting single stage function.

AiP74AHC1G08 and AiP74AHCT1G08 are high-speed Si-gate CMOS devices. They provide a 2-input AND function. The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V. The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

AiP74AHC1G08 and AiP74AHCT1G08 are high-speed Si-gate CMOS devices. They provide a 2-input AND function. The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V. The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

The AiP74AHC1G09 is a high-speed Si-gate CMOS device. The AiP74AHC1G09 provides the 2-input AND function with open-drain output. The output of the AiP74AHC1G09 is an open drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For digital operation this device must have a pull-up resistor to establish a logic HIGH level.

AiP74AHC1G14 and AiP74AHCT1G14 are high-speed Si-gate CMOS devices. They provide an inverting buffer function with Schmitt trigger action. These devices are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V. The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

AiP74AHC1G14 and AiP74AHCT1G14 are high-speed Si-gate CMOS devices. They provide an inverting buffer function with Schmitt trigger action. These devices are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V. The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

The AiP74AHC1G32/AiPAHCT1G32 is a single 2-input or gate circuit.

The AiP74AHC1G32/AiPAHCT1G32 is a single 2-input or gate circuit.

AiP74AHC1G125 and AiP74AHCT1G125 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input ( ). A HIGH at causes the output to assume a high-impedance OFF-state. The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V. The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

AiP74AHC1G125 and AiP74AHCT1G125 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input ( ). A HIGH at causes the output to assume a high-impedance OFF-state. The AHC device has CMOS input switching levels and supply voltage range 2V to 5.5V. The AHCT device has TTL input switching levels and supply voltage range 4.5V to 5.5V.

AiP74AHC1G126 and AiP74AHCT1G126 are single buffer/line drivers with 3-state output.

AiP74AHC1G126 and AiP74AHCT1G126 are single buffer/line drivers with 3-state output.

The AiP74AHC2G04/AiP74AHCT2G04 is a dual inverter.The AiP74AHC2G04 is compatible with CMOS input level, supply voltage range is 2.0V to 5.5V.

The AiP74AHC2G04/AiP74AHCT2G04 is a dual inverter.The AiP74AHCT2G04 is compatible with TTL input level, supply voltage range is 4.5V to 5.5V.

The AiP74AHC2G08; AiP74AHCT2G08 is a high-speed Si-gate CMOS device. The AiP74AHC2G08; AiP74AHCT2G08 provides two 2-input AND gates.

The AiP74AHC2G08; AiP74AHCT2G08 is a high-speed Si-gate CMOS device. The AiP74AHC2G08; AiP74AHCT2G08 provides two 2-input AND gates.

AiP74AHC2G32/AiP74AHCT2G32 is a dual 2-input or gate.

AiP74AHC2G32/AiP74AHCT2G32 is a dual 2-input or gate.

The AiP74AHC/AHCT245 is an octal bus transceiver with 3-state outputs.

The AiP74AHC/AHCT245 is an octal bus transceiver with 3-state outputs.

The AiP74AHC/AHCT373 is an octal D type transparent latch; 3-state.

The AiP74AHC/AHCT373 is an octal D type transparent latch; 3-state.

The AiP74AHC3G04/AiP74AHCT3G04 provides three inverters

The AiP74AHC3G04/AiP74AHCT3G04 provides three inverters

The AiP74AHC/AHCT377 is an octal D-type flip-flop with data enable; positive-edge trigger.

The AiP74AHC/AHCT377 is an octal D-type flip-flop with data enable; positive-edge trigger.

The AiP74AHC/AHCT244 is an octal buffer/line driver with 3-state outputs.

The AiP74AHC/AHCT244 is an octal buffer/line driver with 3-state outputs.

The AiP74AHC/AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (S—D) and reset (R—D). It also has complementary outputs (Q and Q—). The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock  pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for  predictable operation. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

The AiP74AHC/AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (S—D) and reset (R—D). It also has complementary outputs (Q and Q—). The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock  pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for  predictable operation. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

AiP74AHC1G04 and AiP74AHCT1G04 are high-speed Si-gate CMOS devices. They provide an inverting buffer. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.