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CMOS level
| Picture | PN | Description | Voltage Range | Nr of pins | Package |
|---|---|---|---|---|---|
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|
AiP74HC139 | Dual 2-to-4 line decoder/demultiplexer | 2.0 - 6.0 | 16 | DIP16/SOP16/TSSOP16 |
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|
AiP74HC132 | Quad 2-input NAND gate Schmitt-trigger | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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|
AiP74HC126 | Quad Buffer/Line Driver; 3-State | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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|
AiP74HC112 | Dual JK Flip-Flop with Set and Reset;Negative-EdgeTrigger | 2.0 - 6.0 | 16 | DIP16/SOP16/TSSOP16 |
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|
AiP74HC107 | Dual JK Flip-Flop with Reset;Negative-EdgeTrigger | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
-17689714702So0fXM4bW.jpg)
|
AiP74HC95 | 4-Bit Shift Register | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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|
AiP74HC93 | 4-Bit Binary Ripple Counter | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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|
AiP74HC90 | Quad 2-input EXCLUSIVE-OR gate; TTL enabled | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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|
AiP74HC86 | Quad 2-Input Exclusive-Or Gate | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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|
AiP74HC85 | 4-Bit Magnitude Comparator | 2.0 - 6.0 | 16 | DIP16/SOP16/TSSOP16 |
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|
AiP74HC76 | Dual JK Flip-Flop with Set and Reset;Negative-EdgeTrigger | 2.0 - 6.0 | 16 | DIP16/SOP16/TSSOP16 |
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|
AiP74HC74 | Dual D Type Flip-Flop with Set and Reset; Positive-EdgeTrigger | 2.0 - 6.0 | 14 | DIP14/SOP14/TSSOP14 |
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